Memory

INTEL - D2817A-3 - 16K (2K x 8 ) Parallel Electrically-Erasable PROM (EEPROM)

With write protect

Number of Words=2k

Bits Per Word=8 t(a) Max. (s)

Access Time=250n

Output Config=3-State

Number of Chip Selects=1

Program Voltage (V)=5.0, Nom.

Supp (V)=5.0, 28-DIP

RCA - CDM6116AE2 IC, Memory.

CMOS SRAM multiplexed I/O.

2048 word 8 bit.

Package: 24 Dip.

MOSTEK - MK3853N - IC, Static Memory Interface.

8-Bit Static Memory Interface for up to 64KX8SRAM, ROM, or PROM

Package: 40 Dip. 

LSI Type: NMOS 

Operating Temperature:  0 C to 70 C

DC Supply Voltage: +5V/+12V

QUIESC POWER (Max): 710MXMW

Package: DIL-40/2P

Genuine Mostek Vintage Memory Interface IC - Rare  - New Old Stock

Data Book: http://www.bitsavers.org/components/mostek/f8/1978_3870_F8_Microcomputer_Data_Book.pdf

Application: Every Mostek Microcomputer 3870/F8 System requires at least on of these devices.

Alternates: F3853PC, 18202027, 1820-2027, 5962-01-314-6462, 01-314-6462, 5962013146462, 013146462

ALTERA - EP610DC-25 - IC. ELPD Programmed Erasable Memory. 

Used, Clean Socket Pulls

Advanced Micro Devices - AM2716-1DC IC, memory.

Status: Discontinued

UV-Erasable PROM (EPROM) non-inverted output.

Ceramic DIP

Socket Pulls - Used  - 24 Pin-CDIP.

ALTERA - EP1200-ES - Programmable Logic Device

FPGA - Field Programmable Gate Array

Altera EP1200 was the first high-density programmable logic device (PLD). Altera’s technology was manufactured using 3-μm complementary metal oxide semiconductor (CMOS) electrically programmable read-only memory (EPROM) technology and required ultraviolet light to erase the programming, whereas Xilinx’s technology was based on conventional static random access memory (SRAM) technology and required an EPROM to store the programming.

Altera EP1200 programmable logic device was introduced in 1985. The device used UV erasable technology and could hold the equivalent of 1200 logic gates.

28 On-Board Registers

236 Product Terms, on-board Latchesfor the inputs, Programmable I/O

Operate at clock speeds above 16 MHz.

Stand-by Power: 15mW, Active Mode: 400mW.

Package: 40 Pin Ceramic 600 mil DIP Package.

Genuine Altera - Vintage New Old Stock - Rare

Made in USA

When Introduced in 1985 the cost of the EP1200-ES FPGA cost was $129.50 each in quantities of 100.

The Altera PLE-12 Master Progamming unit and similar are used to program EP300, EP320, EP1200, and EP1210 devices.

Hitachi - HN27C256AG-10 - UV Erasable Programmable ROM, 32768-word × 8-bit

Hitachi HN27C256AG is a 256-kbit ultraviolet erasable and electrically programmable ROM, featuring high speed and low power dissipation. Fabricated on advanced fine process and high speed circuitry technique, the HN27C256AG makes high speed access time possible for 16 bit microprocessors such as the 8086 and 68000. And low power dissipation in active and standby modes matches our CMOS 256-kbit EPROM. In programming operation, the HN27C256AG realizes faster programming times than our conventional 256-kbit EPROM by Hitachi’s Fast High-Reliability Programming Algorithm. Pin arrangement, pin configuration and programming voltage are compatible with our 256-kbit EPROM series, therefore existing programmers can be used with the HN27C256AG.

High speed -Access time: 100 ns (max)

• Low power dissipation - Active mode: 25 mW (typ) (f = 1 MHz), Standby mode: 5 µW (typ)
• High reliability and fast programming - Programming voltage: +12.5 V DC 

PGM12.5V

Package: 600-mil 28-pin cerdip (DG-28)

Made in Japan

Alternate: Philips 27C256-20N

MITSUBISHI - M5K4164ANP-15 IC, Memory.

This is a family of 65 536-word by l-bit dynamic RAMs, fabricated with the high performance N-channel silicon gate MOS process, and is ideal for large-capacity memory systems where high speed, low power dissipation, and low costs are essential. The use of double-layer polysilicon process technology and a single-transistor dynamic storage cell privide high circuit density at reduced costs, and the use of dynamic circuitry including sense amplifiers assures low power dissipation. Multiplexed address inputs permit both a reduction in pins to the standard 16-pin package configuration and an increase in system densities. The M5K4164ANP operates on a 5V power supply using the on-chip substrate bias generator.

Status: Discontinued

65,536 Word x 1 Bit

DRAM Page Mode.

Package: 16 DIP.

New Old Stock.